Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Mounting Type
Surface Mount
Number of Elements per Chip
1
Package Type
TSSOP
Output Type
3 State
Pin Count
24
Logic Function
Bus Transceiver
Dimensions
7.9 x 4.5 x 1.05mm
Maximum Low Level Output Current
32mA
Maximum High Level Output Current
-32mA
Propagation Delay Test Condition
15pF
Maximum Operating Supply Voltage
5.5 V
Maximum Propagation Delay Time @ Maximum CL
32.2 ns@ 15 pF
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.65 V
Minimum Operating Temperature
-40 °C
Product details
74LVC Family Bus Transceivers, Texas Instruments
Texas Instruments range of Bus Transceivers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Mounting Type
Surface Mount
Number of Elements per Chip
1
Package Type
TSSOP
Output Type
3 State
Pin Count
24
Logic Function
Bus Transceiver
Dimensions
7.9 x 4.5 x 1.05mm
Maximum Low Level Output Current
32mA
Maximum High Level Output Current
-32mA
Propagation Delay Test Condition
15pF
Maximum Operating Supply Voltage
5.5 V
Maximum Propagation Delay Time @ Maximum CL
32.2 ns@ 15 pF
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.65 V
Minimum Operating Temperature
-40 °C
Product details
74LVC Family Bus Transceivers, Texas Instruments
Texas Instruments range of Bus Transceivers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22