Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
1
Schmitt Trigger Input
Yes
Input Type
Single Ended
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 5 V
Maximum Operating Supply Voltage
5.5 V
Dimensions
2.9 x 1.6 x 1.15mm
Height
1.15mm
Width
1.6mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
2.9mm
Minimum Operating Temperature
-40 °C
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
€ 260.00
€ 1.04 Each (On a Reel of 250) (Exc. VAT)
€ 306.80
€ 1.227 Each (On a Reel of 250) (inc. VAT)
250
€ 260.00
€ 1.04 Each (On a Reel of 250) (Exc. VAT)
€ 306.80
€ 1.227 Each (On a Reel of 250) (inc. VAT)
250
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Please check again later.
Quantity | Unit price | Per Reel |
---|---|---|
250 - 250 | € 1.04 | € 260.00 |
500 - 1000 | € 1.04 | € 260.00 |
1250 - 2250 | € 1.01 | € 252.50 |
2500+ | € 1.01 | € 252.50 |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
1
Schmitt Trigger Input
Yes
Input Type
Single Ended
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 5 V
Maximum Operating Supply Voltage
5.5 V
Dimensions
2.9 x 1.6 x 1.15mm
Height
1.15mm
Width
1.6mm
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
2.9mm
Minimum Operating Temperature
-40 °C
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22