Nexperia 74LVC06APW,112 Hex Inverter, 14-Pin TSSOP
Technical Document
Specifications
Brand
NexperiaLogic Function
Inverter
Output Type
Open Drain
Number of Elements per Chip
6
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 50 pF
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
14
Logic Family
LVC
Dimensions
5.1 x 4.5 x 0.95mm
Height
0.95mm
Maximum Operating Supply Voltage
5.5 V
Width
4.5mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Length
5.1mm
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Country of Origin
Thailand
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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P.O.A.
96
P.O.A.
96
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Technical Document
Specifications
Brand
NexperiaLogic Function
Inverter
Output Type
Open Drain
Number of Elements per Chip
6
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 50 pF
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
14
Logic Family
LVC
Dimensions
5.1 x 4.5 x 0.95mm
Height
0.95mm
Maximum Operating Supply Voltage
5.5 V
Width
4.5mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Length
5.1mm
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Country of Origin
Thailand
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products