Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
1
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
6
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
17.7 ns @ 1.8 V
Maximum Operating Temperature
+85 °C
Length
2mm
Minimum Operating Temperature
-40 °C
Height
0.9mm
Dimensions
2 x 1.25 x 0.9mm
Propagation Delay Test Condition
15pF
Maximum Operating Supply Voltage
5.5 V
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1T Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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€ 1.93
Each (In a Pack of 5) (Exc. Vat)
€ 2.277
Each (In a Pack of 5) (Including VAT)
5
€ 1.93
Each (In a Pack of 5) (Exc. Vat)
€ 2.277
Each (In a Pack of 5) (Including VAT)
5
Buy in bulk
quantity | Unit price | Per Pack |
---|---|---|
5 - 20 | € 1.93 | € 9.65 |
25 - 45 | € 1.88 | € 9.40 |
50 - 120 | € 1.73 | € 8.65 |
125 - 245 | € 1.55 | € 7.75 |
250+ | € 1.49 | € 7.45 |
Technical Document
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
1
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
6
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
17.7 ns @ 1.8 V
Maximum Operating Temperature
+85 °C
Length
2mm
Minimum Operating Temperature
-40 °C
Height
0.9mm
Dimensions
2 x 1.25 x 0.9mm
Propagation Delay Test Condition
15pF
Maximum Operating Supply Voltage
5.5 V
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC1T Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS