SPLD is a Simple Programmable Logic Device. These devices are the smallest, simplest in build and the least-expensive forms of programmable logic devices that can be used in boards.
They are also known as PAL (programmable array logic), GAL (generic array logic, PLD (programmable logic devices).
These logic devices compromise 4-22 fully connected macro cells that consist of some combinatorial logic and flip-flop. They combine the state of number of binary inputs into a binary outputs and if necessary, archived that output in the flip-flop until the next clock edge. SPLDs are often used for address decoding, require the minimum board area and power for operation. The design inside the PLD chip is flexible and change of logic does not require any rewiring of the board.
Types
SPLDs can be divided into 2 general categories:
• Fixed Logic Devices – the circuit in device is permanent and can perform one function or set of functions. They are set bet by a manufacturer and cannot be changed.
• Programmable Logic Devices – these devices can be programmed by the user as many times as it’s required. Due to this ability, they are able to perform a number of functions and work due to the user requirements.

They are commonly used to deliver functions such as:
• Device to device interfacing,
• Data communication
• Signal processing
• Data display
• Timing
• Control operations