DSPIC30F2010-30I/SP Microchip dsPIC30F, 16bit Digital Signal Processor 30MIPS 1.024 kB, 12 kB Flash 28-Pin SPDIP
Technical Document
Specifications
Brand
MicrochipMaximum Frequency
30MIPS
Series
dsPIC30F
Device Million Instructions per Second
30MIPS
Data Bus Width
16bit
RAM Size
512 kB
Instruction Set Architecture
RISC
Program Memory Size
1.024 kB, 12 kB
Program Memory Type
Flash
Mounting Type
Through Hole
Package Type
SPDIP
Pin Count
28
Typical Operating Supply Voltage
2.5 to 5.5 V
Number of UART Channels
1
ADC Resolution
10bit
Minimum Operating Temperature
-40 °C
PWM Resolution
16bit
Number of CAN Channels
0
ADC Channels
6
Number of ADC Units
1
Maximum Operating Temperature
+85 °C
Number of PWM Units
3
Length
35.56mm
ADCs
6 x 10 bit
Timer Resolution
16bit
Height
3.81mm
Number of LIN Channels
0
PWM Channels
6
Width
0.295in
Number of USART Channels
0
Timers
3 x 16 bit
Dimensions
1.4 x 0.295 x 0.15in
Pulse Width Modulation
1(6 Channel) (Motor Control), 2(16 bit)
Number of SPI Channels
1
USB Channels
0
Number of Ethernet Channels
0
Number of Timers
3
Number of I2C Channels
1
Number of PCI Channels
0
Product details
dsPIC30F1010/202x 16-Bit Digital Signal Controllers
Microchip’s dsPIC30F family of Digital Signal Controllers (DSCs) offer designers DSP like performance with the simplicity of an MCU. The dsPIC30F1010/202x range of devices feature peripherals to support digital switch-mode power supplies (SMPS) and other digital power conversion applications.
CPU Features
30 MIPS Max. CPU Speed
Modified Harvard architecture
C Compiler optimized instruction set architecture
83 base instructions with flexible addressing modes
24-bit wide instructions, 16-bit wide data path
12 Kbytes on-chip Flash program space
512 bytes on-chip data RAM
16 x 16-bit working register array
32 interrupt sources
Three external interrupt sources
8 user-selectable priority levels for each interrupt
4 processor exceptions and software traps
DSP Engine Features
Modulo and Bit-Reversed modes
Two 40-bit wide accumulators with optional saturation logic
17-bit x 17-bit single-cycle hardware fractional/integer multiplier
Single-cycle Multiply-Accumulate (MAC) operation
40-stage Barrel Shifter
Dual data fetch
Peripheral Features
High-current sink/source I/O pins: 25 mA/25 mA
Three 16-bit timers/counters – option to pair up 16-bit timers into 32-bit timer modules
One 16-bit Capture input functions
Two 16-bit Compare/PWM output functions
Four PWM generators with 8 outputs
10-Bit 2000 Ksps Analogue-to-Digital Converter (ADC) – 6 to 12 channels depending on model
Four Analogue Comparators
3-wire SPI modules
I2CTM module
UART Module
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Technical Document
Specifications
Brand
MicrochipMaximum Frequency
30MIPS
Series
dsPIC30F
Device Million Instructions per Second
30MIPS
Data Bus Width
16bit
RAM Size
512 kB
Instruction Set Architecture
RISC
Program Memory Size
1.024 kB, 12 kB
Program Memory Type
Flash
Mounting Type
Through Hole
Package Type
SPDIP
Pin Count
28
Typical Operating Supply Voltage
2.5 to 5.5 V
Number of UART Channels
1
ADC Resolution
10bit
Minimum Operating Temperature
-40 °C
PWM Resolution
16bit
Number of CAN Channels
0
ADC Channels
6
Number of ADC Units
1
Maximum Operating Temperature
+85 °C
Number of PWM Units
3
Length
35.56mm
ADCs
6 x 10 bit
Timer Resolution
16bit
Height
3.81mm
Number of LIN Channels
0
PWM Channels
6
Width
0.295in
Number of USART Channels
0
Timers
3 x 16 bit
Dimensions
1.4 x 0.295 x 0.15in
Pulse Width Modulation
1(6 Channel) (Motor Control), 2(16 bit)
Number of SPI Channels
1
USB Channels
0
Number of Ethernet Channels
0
Number of Timers
3
Number of I2C Channels
1
Number of PCI Channels
0
Product details
dsPIC30F1010/202x 16-Bit Digital Signal Controllers
Microchip’s dsPIC30F family of Digital Signal Controllers (DSCs) offer designers DSP like performance with the simplicity of an MCU. The dsPIC30F1010/202x range of devices feature peripherals to support digital switch-mode power supplies (SMPS) and other digital power conversion applications.
CPU Features
30 MIPS Max. CPU Speed
Modified Harvard architecture
C Compiler optimized instruction set architecture
83 base instructions with flexible addressing modes
24-bit wide instructions, 16-bit wide data path
12 Kbytes on-chip Flash program space
512 bytes on-chip data RAM
16 x 16-bit working register array
32 interrupt sources
Three external interrupt sources
8 user-selectable priority levels for each interrupt
4 processor exceptions and software traps
DSP Engine Features
Modulo and Bit-Reversed modes
Two 40-bit wide accumulators with optional saturation logic
17-bit x 17-bit single-cycle hardware fractional/integer multiplier
Single-cycle Multiply-Accumulate (MAC) operation
40-stage Barrel Shifter
Dual data fetch
Peripheral Features
High-current sink/source I/O pins: 25 mA/25 mA
Three 16-bit timers/counters – option to pair up 16-bit timers into 32-bit timer modules
One 16-bit Capture input functions
Two 16-bit Compare/PWM output functions
Four PWM generators with 8 outputs
10-Bit 2000 Ksps Analogue-to-Digital Converter (ADC) – 6 to 12 channels depending on model
Four Analogue Comparators
3-wire SPI modules
I2CTM module
UART Module
Ideate. Create. Collaborate
JOIN FOR FREE
No hidden fees!
- Download and use our DesignSpark software for your PCB and 3D Mechanical designs
- View and contribute website content and forums
- Download 3D Models, Schematics and Footprints from more than a million products